The final RISCs vs. CISCs – 3: The (anti-CISC) propaganda

In the previous article, the definitions of RISCs and CISCs were clearly and (hopefully) comprehensively set out, and these are fundamental to settling the diatribe between these two families, since one should at least be aware of what one is talking about.

Picking up on the conclusion and raising the question again, why do we still continue to flog CISCs and extol RISCs if these terms were no longer relevant? Why do processor manufacturers still claim and take pride in selling them as RISCs? What would be the benefit of pointing out the obvious if these distinctions no longer applied?

Obviously, these are rhetorical questions, as the reality is quite different from what has been propagated for so many years, and one does not even need to resort to who knows what admirable demonstrations to ascertain this (although this has already been done in the previous article, which listed the precise facts/definitions in support).

Common Sense

One only has to ask oneself what we think of when we are faced with an architecture that has so many instructions. Obviously to a CISC! The same when we find instructions that access memory while not being load/store. Ditto when we are dealing with complicated instructions that require several clock cycles. And, again, when we are dealing with instructions of variable-length (not fixed), which, by the way, are still seen as a great complication.

These are not trivialities, but concepts that have been imprinted in our minds during these more than four decades of hammering propaganda by the proponents & promoters of RISCs, who lost no opportunity to stigmatise how ‘bad and ugly’ and pilloryable it all was.

Conversely, a processor with a few simple instructions, executed in the famous and much sought-after single clock cycle and, above all, having a fixed length, immediately brings a single thought to our minds: RISC! Which, needless to say, is the best you can have and want.

Someone may have read Animal Farm: ‘Four Legs Good, Two Legs Bad’. Here it is exactly the same!

The propaganda…

All of this is part of the canon (based on the four pillars I have extensively discussed in the previous article) that has been conveyed, as well as defined, by the centres of the Intelligencija par excellence (the universities), to the point of becoming permanently part of our shared knowledge.

In fact, as a student you are forced to learn these concepts, and then disseminate them and become part of the propaganda machine once you become a teacher, professor, or professional, contributing to their consolidation and sedimentation in the collective imagination.

Constructing what, in effect, then became ‘THE truth’. Repeat the same things over and over again, incessantly, and they will become true…

…and the nefarious effects

RISCs propaganda has been (and still is!) so pervasive and persuasive that processor manufacturers have developed a form of awe of it, the consequences and results of which have been so malignant that some have even marketed their products as RISCs even when they had no semblance of it!

An eloquent example is Motorola (later NXP) with its Coldfire line of processors, which was already marketing them as such in 1994:

All ColdFire cores feature a variable-length RISC architecture

The Coldfires are castrated/reduced versions of the glorious 68000 family, which is one of the most complex architectures ever made and was for a very long time synonymous of CISC along with the more famous x86! And, despite having removed some legacy or more complex parts, the Coldfires remain, without any doubt, CISC processors: no question!

Evangelism still in our time

The paradoxical thing is that, as mentioned in the previous article, the very foundations of RISCs are already gone, and long gone! But instead of admitting their mistakes, academics have instead preferred to silently move away from the definition of the four pillars, although they shamelessly continue to speak of RISCs and CISCs in the same terms (positive vs. negative, of course).

The eminent Prof. Patterson, for instance, acts seamlessly in this way. Here are some of the latest harangues, taken from a presentation (History of Computer Architecture and RISC):

What the consensus in instructions sets today: it’s not CISC. No one built CISC architectures in 30+ years

and an article (A New Golden Age for Computer Architecture):

There have been no new CISC ISAs in decades

you can imagine the rest of the contents…

In the light of the facts presented, I would say that it takes a lot of nerve to continue to brazenly uphold the same bizarre theses. But our dear Happy Days has taught us why this is so:

The reason why academics like this illustrious representative have failed miserably with their beloved RISCs is that they could not foresee the technological advances that were to come, which quickly led in very different directions from those these evangelists had originally conceived.

But more on this in the next article.

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